This is a pair of diagnostic ROMs used to help diagnosing faulty NeoGeo cart systems. One ROM (sp1.bin) is used in place of the BIOS to test most of the components on the board. Another ROM (m1.bin) is used in place of a game cart M1 so the Z80 can test the sound system. The M1 ROM is optional and Z80 testing can be skipped if the sound system doesn't need to be tested. Feedback is given both through the screen and sound codes from the Z80. If method one of output is unusable, such as bad VRAM causing unreadable glitching, the other can potentially be used to know the cause of the error.
No games can be played with this BIOS. It can only be used for testing.
Here's a summary of currently tested features:
The SNK BIOS contains self tests but they either lack useful extra testing or have problems that could stop error information being displayed.
sp1.bin should be burned to a 27c1024 and inserted in place of the regular BIOS.
m1.bin requires a CHA board and is only needed if Z80 testing is wanted. The PROG board is NOT needed and can be removed completely. Any CHA board that uses a NEO-ZMC (or NEO-ZMC2 for AES) will work. The C ROMs aren't needed and can be removed if they can be used for something else. The S1 ROM on the CHA board must remain, but any S1 ROM regardless of the game can be used. M1 should be socketed since for easy updates. Fitting the boards back into the cart case is hard with the socket installed but removal of the PROG board makes an easy fit.
If m1.bin isn't accessable for whatever reason by the system, it will report a Z80 error. Make sure the cart slot and connectors are clean and that the CHA board itself is good. If the cart is known to be good, the system may have a Z80 related fault that prevents the cart from being accessed properly. The same sort of fault can trigger a "Z80 ERROR" with the stock BIOS and also cause issues with game audio.
Testing can be altered depending on input from P1 controller. P2 controller and DIP switches aren't currently used.
If Z80 testing is being used, the CHA board should be inserted into the slot to use for testing. The default slot is #1 and nothing else needs to be done to use it. If any other slot is being used, the stick must be held in a certain position to enable it. The display will go black or discolored if the correct slot isn't used during the Z80 test.
| Stick | Slot # |
|---|---|
| Up | 2 |
| Up/Right | 3 |
| Right | 4 |
| Down/Right | 5 |
| Down | 6 |
1-slot and AES systems don't require any stick input.
You must power on with button D held. This does the full set of tests including Z80 testing which requires a test cart to be inserted according to the instructions above. If Z80 testing is attempted without a cart, you will get a blank screen of some colour. By default, no Z80 testing is done and no cart needs to be inserted.
You must power on with button B held if you are doing Z80 testing. These do not have an SM1 ROM and must be treated differently or else false errors will appear.
If your AES is modded to use backup RAM, you can optionally power on with button C held. Backup RAM testing is only done on MVS by default.
If ABCD is held down on power on, a submenu appears. Otherwise normal testing goes ahead.
The RAM test loops are similar to the MVS "WORK RAM TEST" but is more robust (i.e. less crash prone) and can be used for all types of RAM in the system. Except for the 2K VRAM test loop, the test loops that work on display RAM cause the screen to show garbage. This is normal and by holding A button, you can pause the test and view current progress. Releasing the A button resumes the test where it left off. This is also useful to confirm if the system is actually running.
The misc. input test shows real time states of memory card and system configuration inputs. It's a real time display so any changes on the board will immediately appear on screen such as memory card being inserted / removed.
Normally the errors are displayed on screen with additional info depending on the type of error.
If Z80 testing is also being done, the Z80 will (attempt to) play a code using low and high pitched tones if it finds an error. Z80 will also (attempt to) tell the 68k what went wrong. If the 68k confirms that the Z80 had a genuine error, it will display a description of it on screen when the Z80 finishes playing the error code.
Also, if Z80 testing is done and Z80 passed all tests, it can then be used to play error codes that happen anywhere else in the system. For example, if the 68k reports a VRAM error then it will tell the Z80 to play an error code to signal the error. This can be useful if this VRAM error (or any other display related problem) stops the error info from being displayed on screen.
Each error is listed next to its code used for playing each tone. The codes are binary values that are read left-to-right. A '0' is a low pitched tone and a '1' is a high pitched tone. For example, the M1 CRC ERROR sounds like 5 low pitched tones and then 1 high pitched tone.
Z80 error codes (6 tones):
| Error | Code |
|---|---|
| M1 CRC ERROR (fixed region) | 000001 |
| M1 UPPER ADDRESS (fixed region) | 000010 |
| RAM DATA (00) | 000100 |
| RAM DATA (55) | 000101 |
| RAM DATA (AA) | 000110 |
| RAM DATA (FF) | 000111 |
| RAM ADDRESS (A0-A7) | 001000 |
| RAM ADDRESS (A8-A10) | 001001 |
| Z80<->68k COMM. ERROR (DATA) | 001100 |
| Z80<->68K COMM. ERROR (CLEAR) | 001101 |
| YM2610 I/O ERROR | 010000 |
| YM2610 IRQ FLAG TIMING ERROR | 010001 |
| YM2610 IRQ TIMING ERROR | 010010 |
| YM2610 UNEXPECTED IRQ | 010011 |
| M1 BANK ERROR (16K) | 010100 |
| M1 BANK ERROR (8K) | 010101 |
| M1 BANK ERROR (4K) | 010110 |
| M1 BANK ERROR (2K) | 010111 |
68k error codes (7 tones):
| Error | Code |
|---|---|
| BIOS ADDRESS (A13-A15) | 1000001* |
| BIOS CRC ERROR | 1000000* |
| WRAM DEAD OUTPUT (LOWER) | 1000100* |
| WRAM DEAD OUTPUT (UPPER) | 1000101* |
| BRAM DEAD OUTPUT (LOWER) | 1000110* |
| BRAM DEAD OUTPUT (UPPER) | 1000111* |
| WRAM DATA (0000) | 1001000* |
| WRAM DATA (5555) | 1001001* |
| WRAM DATA (AAAA) | 1001010* |
| WRAM DATA (FFFF) | 1001011* |
| BRAM DATA (0000) | 1001100 |
| BRAM DATA (5555) | 1001101 |
| BRAM DATA (AAAA) | 1001110 |
| BRAM DATA (FFFF) | 1001111 |
| WRAM ADDRESS (A0-A7) | 1010000 |
| WRAM ADDRESS (A8-A14) | 1010001 |
| BRAM ADDRESS (A0-A7) | 1010010 |
| BRAM ADDRESS (A8-A14) | 1010011 |
| PALETTE 74245 DEAD OUTPUT (LOWER) | 1101110 |
| PALETTE 74245 DEAD OUTPUT (UPPER) | 1101111 |
| PALETTE RAM DEAD OUTPUT (LOWER) | 1101100 |
| PALETTE RAM DEAD OUTPUT (UPPER) | 1101101 |
| PALETTE BANK0 DATA (0000) | 1010100 |
| PALETTE BANK0 DATA (5555) | 1010101 |
| PALETTE BANK0 DATA (AAAA) | 1010110 |
| PALETTE BANK0 DATA (FFFF) | 1010111 |
| PALETTE BANK1 DATA (0000) | 1011100 |
| PALETTE BANK1 DATA (5555) | 1011101 |
| PALETTE BANK1 DATA (AAAA) | 1011110 |
| PALETTE BANK1 DATA (FFFF) | 1011111 |
| PALETTE ADDRESS (A0-A7) | 1011100 |
| PALETTE ADDRESS (A8-A12) | 1011101 |
| VRAM DATA (0000) | 1100000 |
| VRAM DATA (5555) | 1100001 |
| VRAM DATA (AAAA) | 1100010 |
| VRAM DATA (FFFF) | 1100011 |
| VRAM ADDRESS (A0-A7) | 1100100 |
| VRAM ADDRESS (A8-A10/A8-A14) | 1100101 |
| VRAM 32K DEAD OUTPUT (LOWER) | 1101000 |
| VRAM 32K DEAD OUTPUT (UPPER) | 1101001 |
| VRAM 2K DEAD OUTPUT (LOWER) | 1101010 |
| VRAM 2K DEAD OUTPUT (UPPER) | 1101011 |
| WRAM UNWRITABLE (LOWER) | 1110000* |
| WRAM UNWRITABLE (UPPER) | 1110001* |
| BRAM UNWRITABLE (LOWER) | 1110010* |
| BRAM UNWRITABLE (UPPER) | 1110011* |
| PALETTE RAM UNWRITABLE (LOWER) | 1110100 |
| PALETTE RAM UNWRITABLE (UPPER) | 1110101 |
| VRAM 32K UNWRITABLE (LOWER) | 1111000 |
| VRAM 32K UNWRITABLE (UPPER) | 1111001 |
| VRAM 2K UNWRITABLE (LOWER) | 1111010 |
| VRAM 2K UNWRITABLE (UPPER) | 1111011 |
| MMIO DEAD OUTPUT | 1111100 |
*: these tests currently happen before the Z80 is initialised so no audible error codes will be played for these.
The neo-geo.com Tech Support forum is the best place to ask for help when stuck.
Some errors aren't as self explanatory as others but they often have very specific causes that help narrow down the exact cause. Traces to check between relevant chips are included for various errors below but note that this isn't an exhaustive list. Pin numbers can be found for custom chips and cart connectors on the NeoGeoDevWiki.
All errors relating to RAM may be due to the RAM itself but many of of these errors have only a few specific pins to check so it's worth ruling it out first. In all cases, the "UPPER" chip refers to the RAM connected to D8~D15 of the 68k and the "LOWER" RAM is connected to D0~D7. All RAMs referenced here use pairs of identical RAMs except for the 6116 used by the Z80.
RAM errors which appear to be caused by bad address line traces are reported as address errors. Refer to the pinout for the type of chip used by the given RAM and ensure that the given group of 8 traces are all good. It's possible but unlikely for an address error to be a faulty RAM.
Both diagnostic ROMs include a CRC32 self-test that run before any of their tests do. This isn't to detect any faults with the hardware but to catch a bad EPROM burn before any potentially misleading results are given. Verify the EPROM with your programmer if this error appears.
It's possible for the diagnostic ROMs to work as normal if some of the upper address lines to the socket are damaged. This will result in an "UPPER ADDRESS" error which most likely means that the given list of address lines to the ROM socket are damaged. Address lines A13~A15 for the SP1 ROM are caught and A10~A15 are caught for the M1 ROM. These traces need to be checked if this error appears.
A RAM seems to be outputting nothing at all when attempting to read it. The RAM /OE trace may be cut, the custom chip or circuit that generates it may be faulty or it may not be powered.
The 74xx32 referenced here should be the same chip on the board as referenced in the "BRAM UNWRITABLE" error.
On older boards using LSPC-A0:
On most boards using LSPC2-A2:
Note that these RAMs have a very high failure rate so the chip itself is probably faulty.
A RAM seems to output the same data regardless of what is (attempted to be) written to it. The RAM /WE trace or circuit that generates it is suspect.
Pins used from the 74xx32 chip vary with board type. Each reference to the '32 refers to the same single chip on the board. The /WE circuit has many points of possible failure.
On older boards using LSPC-A0:
On most boards using LSPC2-A2:
On older boards using LSPC-A0:
On most boards using LSPC2-A2:
On most MVS boards:
On all AES systems except 1st gen (NEO-AES):
Z80 isn't receiving the expected data from the 68k communication I/O port. Most likely an issue with the Z80 data bus or control signal trace to the chips that control the port (NEO-C1, NEO-D0).
Z80 requested the I/O port to clear its contents to zero and it failed. A specific control signal is used for this.
YM2610 isn't responding to the Z80 reads and writes as expected. Most likely a bad trace between the Z80 and YM2610 but it could also mean a faulty 2610. This is the first 2610 test to check that it's actually functioning and accessible. Games will likely run but they'll be completely muted.
YM2610 has an internal timer that isn't ticking as expected. This can be caused by any of the traces listed for "YM2610 I/O ERROR" but is also likely a faulty YM2610. Games may run with some sound effects but no music.
Z80 did not receive an IRQ from the YM2610 when it was expecting one. This is most likely the IRQ trace from the Z80 or a problem with the YM2610 or Z80.
Z80 received an IRQ from the YM2610 when it was not expecting one. If the INT pin on the Z80 is somehow not shorted, then there is likely an issue with the YM2610. Stuck IRQ pins seem to be common on faulty YM2610s.
Z80 isn't reading the expected data from the bankswitched M1 ROM. Assuming the NEO-ZMC on your test cart is working and all M1 ROM traces have good continuity, this is most likely the SDRD0 control signal (on the CHA board) which used to configure the NEO-ZMC banking. This can cause all sorts of muting and bad music / sound playback.
68k isn't getting any output from a 74xx245 chip (or equivalent hardware such as the NEO-G0) that is connected to a palette RAM. A few control signals connected to the '245 chips are used to enable the output and control the data direction. If these traces are good then the 245 may be dead. Note that this error is not caused by the palette RAMs themselves, just the '245 chips that sit between them and the 68k.
On most MVS boards:
On all AES systems except 1st gen (NEO-AES):